Montage Technology Starts Industry-First Trial Production of CXL 3.2 MXC Chip

Montage Technology announced today that it has begun trial production of the industry's first CXL 3.2 Memory eXpander Controller (MXC) chip, a move aimed at addressing the surging demand for memory expansion and resource pooling in AI, cloud computing, and data center environments. By leveraging CXL technology, the new controller enables customers to build memory infrastructure with higher capacity, improved resource utilization, and greater operational flexibility.

The CXL 3.2 MXC complies with the CXL Type 3 specification, supporting both CXL.mem and CXL.io protocols. It is designed with PCIe 6.x and CXL 3.2 protocol support, delivering data transfer rates of up to 64 GT/s per lane. The chip integrates dual DDR5 memory controllers supporting up to 8000 MT/s, and by converting host-side CXL memory requests into DDR commands in real time, it enables efficient data exchange between the host and backend memory, effectively breaking through the memory capacity limits of traditional servers.

Beyond the core controller, the chip integrates PCIe 6.x PHY, DDR5 PHY, dual RISC-V processor subsystems, and a full suite of management interfaces. It supports multiple CXL memory expansion form factors, including PCIe AIC cards and EDSFF modules, providing critical building blocks for emerging memory architectures such as expansion, pooling, and tiered memory.

"The trial production of the CXL 3.2 MXC chip marks an important milestone in Montage Technology's pursuit of CXL innovation and commercialization," said Stephen Tai, President of Montage Technology. "As memory demands continue to surge in the AI era, we are providing our customers with high-bandwidth, large-capacity, and highly reliable memory expansion solutions, accelerating the large-scale adoption of CXL in data center and AI infrastructure."

In addition to the chip itself, Montage Technology offers a complete software development kit (SDK) along with analysis and testing tools to help customers accelerate product development, compatibility validation, and mass production. The CXL 3.2 MXC has already been integrated into next-generation CXL products by leading memory module manufacturers, including Samsung and SK hynix, with initial validation successfully completed. The solution is also designed to align with leading server platforms, including Intel Xeon and AMD EPYC, to ensure broad interoperability and optimal performance.

Industry partners have voiced strong support for the milestone. Jangseok Choi, VP of Memory Product Planning at Samsung Electronics, said the combination of the CXL 3.2 MXC with DDR5 memory technology offers data center customers a balanced performance-and-capacity solution, and that the collaboration validates CXL's value in increasing system memory capacity and resource utilization. Uksong Kang, Head of Next Gen Product Planning & Standard at SK hynix, noted that with the rapid adoption of large language models and generative AI, memory has become a critical factor in system performance, and that Montage's MXC product demonstrates strong potential for supporting high-capacity memory expansion and resource sharing.

Dr. Debendra Das Sharma, Senior Fellow and Chief I/O Architect at Intel, remarked that AI, next-gen cloud systems, and today's industry economics are reshaping server memory architecture and driving demand for CXL. He said Montage's CXL 3.2 MXC demonstrates how the maturing CXL ecosystem delivers protocol support, compatibility, and performance, helping to unlock the memory expansion capabilities of next-generation Intel Xeon platforms. Amit Goel, corporate vice president of Compute and Enterprise AI Platform Solutions Engineering at AMD, added that AI and data center workloads are driving continuous evolution of system architecture, making memory a key factor in performance and scalability, and that AMD looks forward to continued collaboration with Montage on CXL technologies.

Montage Technology will showcase its CXL 3.2 MXC solutions at the CXL DevCon on August 3, 2026, at the Santa Clara Marriott, and at the FMS (Future of Memory and Storage) exhibition from August 4–6, 2026, at the Santa Clara Convention Center (Booth #845), both in Santa Clara, USA.