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Google reportedly partners with AMD on TPU v10 as shipments of current generations cut, says SemiAnalysis

By: IDCNOVARegion: North America
Google is reportedly working with AMD on the development of its tenth-generation Tensor Processing Units (TPUs), according to analysts at research firm SemiAnalysis. The disclosure, shared via social media, suggests that AMD's involvement would mark its first significant foray into custom AI ASIC projects, despite the company maintaining a dedicated custom silicon team.

"Market chatter suggests Google is working with AMD on a TPU project in the v10 generation," the report stated. "AMD's involvement would be the first real involvement in a custom AI ASIC project, despite having a custom silicon team." The analysts also highlighted AMD's strengths in advanced packaging and SoIC technologies, as well as its CPU IP, which could prove valuable given growing demand from Google and its customers for TPUs featuring on-package CPU cores tailored for reinforcement learning workloads.

The rumor surfaced alongside revised market data from SemiAnalysis, which indicated lower-than-expected TPU output in the second half of 2026. The firm attributed the shortfall to challenges in ramping capacity for CoWoS-S (Chip-on-Wafer-on-Substrate-Silicon) advanced packaging. For 2027, SemiAnalysis also reduced its forecast for TPU shipments, cutting expectations for TPU 7 and TPU 8i from 6 million units to a lower figure, driven by greater allocation of packaging capacity toward other customers.

Specifically, the firm revised down its projection for Google's v7 TPU, codenamed Ironwood, from 3.2 million units to 2.7 million units. In parallel, Broadcom, a key manufacturing partner for Google's TPU line, is said to have trimmed its total 2026 CoWoS wafer output from 250,000 wafers to 215,000 wafers, reflecting the broader supply chain constraints.

Google's TPU journey began in 2013 with the development of the v1 chip, which was deployed internally in 2015 and publicly unveiled at Google I/O in May 2016. The processors became available to external cloud customers in 2018, marking a significant step in Google's AI infrastructure strategy.

The latest developments follow a series of strategic moves by Google to solidify its custom silicon roadmap. In April 2026, Broadcom disclosed in a regulatory filing that it had entered into a Long-Term Agreement with Google to develop and supply future generations of TPUs. The filing also revealed a Supply Assurance Agreement under which Broadcom would provide networking and other components for Google's next-generation AI racks through 2031.

Two weeks later, Google unveiled its eighth-generation TPU family, comprising two chips dedicated to AI training and inference workloads. Named the TPU 8t for training and the TPU 8i for inference, the hardware was developed in partnership with Google DeepMind and features purpose-built architectures designed to support model training, agent development, and inference tasks.

Following the release of its Q1 2026 results, Google announced plans to offer its TPUs to a "select group of customers" for deployment in their own data centers, signaling a broader commercial push beyond its cloud platform.

Industry observers note that the potential AMD collaboration could reshape the competitive landscape for custom AI silicon, particularly as hyperscalers seek to diversify supply chains and accelerate innovation in AI hardware. The reported production cuts for current-generation TPUs also underscore ongoing challenges in advanced packaging, a critical bottleneck for high-performance AI chips across the sector.